| ARM Cortex-A8/A9开发板 | ARM11开发板ARM11开发套件 | ARM9开发板ARM9开发套件 | 飞思卡尔I.MX28I.MX6开发板 |
| tiny210/mini210开发板 | mini6410开发板/套餐 | Tiny6410开发板无线套件 | mini2440开发板/套餐 | micro2440开发板带核心板 | 友善开发板配件 模块 | QQ2440 V3 SBC-2410X |
| FL2440 OK2440-IV V4 | OK2440-III OK2440V3 | TE2440-II TE2440V2 | OK6410 S3C6410 ARM11 | FL6410/OK6410B ARM11 | TE6410 S3C6410 ARM11 | TE-9263 AT91SAM9263 | 开发板配件 模块和其他 |
| Xilinx开发板/fpga开发套件 | ａｌｔｅｒa开发板/fpga开发套件 | 基于FMC FPGA/DSP子卡 |
| BeagleBoard原厂开发板 | PandaBoard原厂开发板 |
| TI DM3730 DevKit8500D | TI系列 omap3530开发板 | ATMEL系列 开发板 | Samsung系列 开发板 | 开发板配件-仿真器 模块 | NXP LPC3250 mini3250 |
| Tiny210 三星S5PV210 | Mini210/Mini210s开发板 | Tiny4412开发板Cortex-A9 | Tiny6410开发板 ARM11 | mini2440开发板 ARM9 | micro2440开发板 ARM9 | mini6410开发板 ARM11 | 友善ARM开发板配件 模块 |
| keil ARM仿真器/开发工具 | STM32开发板 Cortex-M3 | NXP LPC开发板Cortex-M3 | ATMEL系列 ARM开发板 | Luminary EKK8962开发板 | Freescale i.MX31开发板 | 三星s3c2440 s3c6410开发板 |
| FL2440 OK2440-IV V4 | OK6410 S3C6410 ARM11 | FL6410/OK6410B ARM11 | OK210/-A Cortex-A8 | TE2440-II TE2440V2 | TE6410 S3C6410 ARM11 | TE-9263 AT91SAM9263 | ARM开发板配件 模块等 |
| Real6410开发板/套餐 | Real210开发板/Real2410 | WIFI GPS GPRS模块摄像头 |
| Xilinx开发板/开发套件KIT | Altera开发板/开发套件KIT | 配套模块 |
| NXP LPC开发板 ARM7 | Cortex-M3 STM32开发板 | 最小系统模块类(初学者勿选) | 开发工具 仿真器 调试器 | TFT液晶屏LCD 液晶模块 |
| DM642开发板/DM642实验箱 | DM6446开发板/DSP实验箱 | DSP仿真器 液晶屏 摄像头等 |
| DM3730/AM3715/AM3359 | OMAP3530AM1808AM3517 | 飞思卡尔Cortex-A9开发板 | ATMEL系列ARM开发板 | NXP LPC3250 LPC1788 | Samsung系列ARM开发板 | STM32系列F207/F407 | ARM开发板配件-仿真器 模块 |
| Realv210 S5PV210开发板 | Real6410开发板 ARM11 | WIFI GPS GPRS模块摄像头 |
| NXP LPC开发板 ARM7 | Cortex-M3 STM32开发板 | ARM小系统模块(初学勿选) | 开发工具 ARM仿真器 调试器 | TFT液晶屏LCD 液晶模块 |
| keil ARM仿真器/开发工具 | STM32开发板 Cortex-M3 | NXP LPC开发板Cortex-M3 | ATMEL系列 ARM开发板 | Luminary EKK8962开发板 | Freescale i.MX31开发板 | 三星s3c2440 s3c6410开发板 |
| Exynos4412开发板A9四核 | UT-S5PV210 S5PC100 | UT-S3C6410开发板 ARM11 | idea 6410开发板 ARM11 | UT-S3C2450开发板 ARM9 | UT-S3C2416开发板 ARM9 | UT-S3C6410核心板 工控 |
| Xilinx开发板 FPGA开发套件 | ａｌｔｅｒa开发板 FPGA开发套件 | FMC模块 配件 下载线 |
| DM642开发板/DM642实验箱 | DM6446开发板/DSP实验箱 | DSP仿真器 液晶屏 摄像头等 |
| s3c2410 ARM9 FS2410 | s3c2440开发板 ARM9 | s3c44B0开发板 ARM7 | s3c6410 2450 2443/13 | PXA270 PXA320 PXA255 | Atmel 9200 9261 9G20 | Philips NXP开发板YL-LPC | FS-EP9315开发板ARM9 | LCD液晶屏TFT真彩/触摸屏 | ARM仿真器/仿真调试工具 | ARM开发板配套ARM核心板 |
| 三星s3c2410 s3c44B0 | 三星s3c6410 s3c2443 | Intel PXA270 PXA320 | UP-CUP OMAP5910平台 | FPGA Xilinx ａｌｔｅｒa平台 | 配件-仿真器 模块 液晶屏LCD | 龙芯开发板UP-DRAGON-I | 物联网教学科研设备 | EDA/FPGA/SOPC教学科研 |
| utu2440-F-V4.5 含核心板 | utu2440-S-V4.1 单板结构 | YC2440-F-V5.1开发板 豪华型 | YC-ePC-A系列人机界面 | Mars-EDA套件CPLD FPGA | 触摸屏LCD 摄像头 WI-FI模块 |
| ARM开发板/开发平台 | FPGA开发板/开发平台 | 编程器/烧写器下载器烧录 | ZLG 仿真器ARM FPGA DSP | ZLG周立功逻辑分析仪 |
| DSP初学者开发套件(DSK) | DSP仿真器/仿真系统 | DSP开发板/DSP试验箱 | DaVinci系列多媒体平台 | Xilinx FPGA大学计划产品 | SEED教学实验系统 | FPGA/DSP FPGA开发板 | TI原厂开发板套件/CCS软件 |
| ARM开发板 | XSCALE开发板 | ARM仿真器 | SOPC开发板 | DSP开发板 | 达芬奇系列DSP开发平台 | DSP仿真器 | DSP实验箱 | DSP专业研究平台 | ARM实验箱系列 |
| 广嵌实验室项目产品 | GEC2440/GEC6410开发板 |
| 泰克Tektronix示波器 | 普源RIGOL示波器 | USB虚拟示波器 |
| UT-S5PC100 UT-S5PV210 | UT-S3C6410开发板 ARM11 | idea 6410开发板 ARM11 | UT-S3C2450开发板 ARM9 | UT-S3C2416开发板 ARM9 | UT-S3C6410核心板 工控 | 开发板模块wifi gps等 |
| EMA OMAP3530开发板 | EMA OMAP 3530核心板 |
| 三星s3c2410 s3c44B0 | 三星s3c6410 s3c2443 | Intel PXA270 PXA320 | UP-CUP OMAP5910平台 | FPGA Xilinx Altera平台 | 配件-仿真器 模块 液晶屏LCD | 龙芯系列 UP-DRAGON-I |
| utu2440-F-V4.5 含核心板 | utu2440-S-V4.1 单板结构 | YC2440-F-V5.1开发板 豪华型 | 触摸屏LCD 摄像头 WI-FI模块 | Mars-EDA套件CPLD FPGA | ePC系列工控一体机ARM9 A8 |
| ARM开发板/开发平台 | FPGA开发板/开发平台 | 编程器/烧写器下载器烧录 | ZLG 仿真器ARM FPGA DSP | ZLG周立功逻辑分析仪 |
| DSP初学者开发套件(DSK) | DSP仿真器 | DSP开发板 | DSP实验箱 | Xilinx FPGA大学计划产品 |
| ARM开发板 | XSCALE开发板 | ARM仿真器 | SOPC开发板 | DSP开发板 | 达芬奇系列DSP开发平台 | DSP仿真器 | DSP实验箱 | DSP专业研究平台 | ARM实验箱系列 |
| ARM开发板S3C6410等 | Cortex-A8/ARM11仿真器 | ADSP Blackfin开发板 | FPGA Spartan-3E开发板 |
| GEC2410开发套件ARM9 | GEC2440开发套件ARM9 |
| 泰克 示波器 |
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原厂产品品质100%保证，所以不在“七天无理由退换”范围内，只承诺存在质量问题情况下15天包换。
原装正版，提供授权！
放心购买，假一罚十！
适合大型外企以及事业单位！
8.0版本相对7.0以前版本新增特性：
1. SWD硬件接口支持1.2-5.0V的目标板，7.0以前只能支持3.3V的目标板.
2. 8.0使用双色LED可以指示更多的工作状态，7.0以前是单色LED指示灯.
3. 8.0对ARM11的支持增强,速度较7.0以前快.
注：
1. V6与V5的区别：支持SWD，及目标电源支持5V
2.本站V5的也支持5V目标电压
V6硬件版本的Jlink与V5版本主要的差别除了V6支持SWD外，还改进了接口电路，新增以下特点：
1.V6版本可以兼容1.65-5.5V的JTAG电平，可以直接调试诸如STR735的5V ARM芯片；
2.V6版本的输出具备三态；
3.USB接口电路方面加入了ESD保护；
4.采用更低功耗电源设计；
V6硬件版本同时具备V5版本所具有的以下特点：
* USB 2.0接口；
* 支持任何ARM7/ARM9/ARM11 核Cortex M3 supported, 包括ithumb 模式；
*Cortex M3 support, including JTAG, SWD and SWV
* 下载速度达到720k byte/s;
* DCC速度到达800k byte/s;
* 与IAR Workbench可无缝集成；
* 通过USB供电，无需外接电源；
* JTAGZ大时钟达到12M；
* 自动内核识别；
* 自动速度识别；
* 支持自适应时钟；
* 所有JTAG信号能被监控，目标板电压能被侦测；
* 支持JTAG链上多个设备的调试；
* 完全即插即用；
* 20Pin标准JTAG连接器；
* 宽目标板电压范围：1.2V-5.0V；
* 多核调试；
* 包括软件：J-Mem,可查询可修改内存；
* 包括J-Link Server:(可通过TCP/IP连接到J-Link);
* 标配J-Flash,支持独立的Flash编程，可以作为量产解决方案；
* 标配RDI插件使J-Link适合任何RDI兼容的调试器如IAR、ADS、Relview和Keil等；
* 标配RDI Flash BP，可以实现在RDI下，在Flash中设置无限断点；
* 标配RDI Flash DLL,可以实现在RDI下的对Flash的独立编程；
* 标配GDB server，可以实现在GDB环境下的调试。
* 全功能版本具备RDI,FLASHDL,FLASHBP,J-FLASH ARM,GDB License.
J-Link ARM Specifications
1、Target voltage can be measured
2、Fully plug-and-play compatible
3、Supports any ARM7/ARM9/ARM11 core,Cortex M3 support, including JTAG, SWD and SWV
4、Powered through USB (<50mA)
5、Full USB 2.0 speed
6、Download speed up to 600 kBytes/s
7、DCC speed up to 800 kb/s
8、Max. JTAG speed 12 MHz
9、Standard 2x10 pin JTAG connector
10、Automatic core recognition
11、Auto speed recognition
12、Support for multiple devices on scan chain
13、Fully plug-and-play compatible
14、All JTAG signals can be monitored
15、Supports 1.2-5 V target voltage
Supported ARM Cores:
J-Link has been tested with the following cores, but should work with any
ARM7/ARM9 /ARM11 and Cortex-M3 core.
* ARM7TDMI (Rev 1)
* ARM7TDMI (Rev 3)
* ARM7TDMI-S (Rev 4)
* ARM720T
* ARM920T
* ARM922T
* ARM926EJ-S
* ARM946E-S
* ARM966E-S
* Cortex-M3
* Cortex-M0
* Cortex-R4
配件清单：
1、J-LINK V8 仿真器(德国原装进口) 1 台
2、USB线 1 条
3、20PIN 优质连接线 1条
本产品三年保修.
原厂链接：
http://www.segger.com/jlink.html
驱动下载：
http://www.segger.com/download_jlink.html
http://www.mcu123.com/product/jlink/Setup_JLinkARM_V406b.zip (2009.06.10 ｕｐｄａｔｅ)
J-LINK用户指南 Rev3.2
http://www.mcu123.com/product/jlink/J-Link_UG_V3.2.pdf
JLink V8.0 SWD方式调试LM3S6916信息截图(基于IAR 5.4):
J-Link (就是我们通常所指的JLINK V8)
J-Link is a USB powered JTAG emulator supporting a large number of CPU cores.
Based on a 32-bit RISC CPU, it can communicate at high speed with the supported target CPUs. J-Link is used around the world in tens of thousand places for development and production (flash programming) purposes.
J-Link support is integrated in most professional IDEs such as IAR, Keil, Rowley and many others.
Along with the OEM version (such as IAR J-Link, ATMEL SAM-Ice and others) more than 60,000 J-Links have been sold so far, making J-Link probably the most popular emulator for ARM cores and the de-facto standard.
The J-Link software contains an additional feature, called Flash Breakpoints.
Flash breakpoints allow the user to set an unlimited number of software breakpoints when debugging in flash memory.
This feature is also available for J-Link RDI.More info...
J-Flash is a PC software running on Windows 2000/XP ｓｙｓｔｅｍs, which enables you to program your Flash EEPROM devices via the On-Chip Debug connector (JTAG) on your target ｓｙｓｔｅｍ.More info...
The J-Link GDB Server is a remote server for the GDB.
The GDB and GDB Server communicate via a TCP/IP connection, using the standard GDB remote serial protocol.
The GDB Server translates the GDB monitor commands into J-Link commands.More info...
The J-Link DLL is a standard Windows DLL typically used from "C" (Visual Basic ｏｒ Delphi projects are also doable).
It makes the entire ｆｕｎｃｔｉｏｎality of J-Link available thru the exported ｆｕｎｃｔｉｏｎs.More info...
An enhanced version of the J-Link SDK, which contains additional API ｆｕｎｃｔｉｏｎs for flash programming.
The additional API ｆｕｎｃｔｉｏｎs (Prefixed JLINKARM_FLASH) allow erasing and programming the internal flash memory of many ARM 7/9 and Cortex-M3 MCUs.More info...
The J-Link ARM RDI software is an RDI interface for J-Link.
It makes it possible to use J-Link with any RDI compliant debugger.More info...
The following table shows the features which are ｉｎｃｌｕｄｅd in the available J-Link bundles.
| Flash Breakpoints |  |
 |
|
| GDB Server | |
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| RDI | |
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| J-Flash | |
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| Supported OS | Microsoft Windows 2000 Microsoft Windows XP Microsoft Windows XP x64 Microsoft Windows 2003 Microsoft Windows 2003 x64 Microsoft Windows Vista Microsoft Windows Vista x64 Windows 7 Windows 7 x64 |
| Electromagnetic compatibility (EMC) | EN 55022, EN 55024 |
| Operating ｔｅｍｐerature | 5°C ... 60°C |
| Storage ｔｅｍｐerature | -20°C ... 65 °C |
| Relative humidity (non-condensing) | Max. 90% rH |
| Size (without cables) | 100mm x 53mm x 27mm |
| Weight (without cables) | 70g |
| USB interface | USB 2.0, full speed |
| Target interface | JTAG 20-pin (14-pin adapter available) |
| Power supply | USB powered Max. 50mA Target Supply current. |
| Target interface voltage (VIF) | 1.2V ... 5V |
| Target supply voltage | 4.5V ... 5V (if powered with 5V on USB) |
| Target supply current | Max. 300mA |
| Reset Type | Open drain. Can be pulled low ｏｒ tristated. |
| Reset low level output voltage (VOL) | VOL <= 10% of VIF |
| For the whole target voltage range (1.8V <= VIF <= 5V) | |
| LOW level input voltage (VIL) | VIL <= 40% of VIF |
| HIGH level input voltage (VIH) | VIH >= 60% of VIF |
| For 1.8V <= VIF <= 3.6V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 10% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 90% of VIF |
| For 3.6 <= VIF <= 5V | |
| LOW level output voltage (VOL) with a load of 10 kOhm | VOL <= 20% of VIF |
| HIGH level output voltage (VOH) with a load of 10 kOhm | VOH >= 80% of VIF |
| SWO sampling frequency | Max. 6MHz |
| Data input rise time (Trdi) | Trdi <= 20ns |
| Data input fall time (Tfdi) | Tfdi <= 20ns |
| Data output rise time (Trdo) | Trdo <= 10ns |
| Data output fall time (Tfdo) | Tfdo <= 10ns |
| Clock rise time (Trc) | Trc <= 10ns |
| Clock fall time (Tfc) | Tfc <= 10ns |
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The number of IDEs supporting J-Link, as well as the high speed, ease-of use and support for flash breakpoints have made J-Link the de-facto standard for ARM emulators. Today J-Link is probably the most popular emulator for ARM cores. Unｌｉｋｅ many of our competitors, we do not charge for software ｕｐｄａｔｅs. All CPU families supported by the J-Link software can be used without additional license. |
| Q: | What is the advantage of J-Link versus simple probes such as FTDI based ｓｙｓｔｅｍs? |
| A: | J-Link has numerous advantages. One of the biggest advantages is the J-Link software supplied by SEGGER, which allows using it with common IDEs, the availability of flash breakpoints for people debugging software which runs in the flash of microcontrollers, as well as the high speed of the J-Link and the simple and very fast download into flash memory.
In contrast to most of the simple probes, it supports adaptive clocking as well as SWD and SWO. It also works more stable since it is not just a dump USB to JTAG converter, but uses the intelligence of the built-in CPU, providing a more robust communication, especially in situations ｗｈｅｒｅ the target CPU runs at low clock speeds. |
| Q: | I want to write my own application and use J-Link. Is this possible? |
| A: | Yes. We offer a dedicated Software Developer Kit (SDK). It allows using the full J-Link ｆｕｎｃｔｉｏｎality. [More info...] |
| Q: | The core of my target ｓｙｓｔｅｍ could not be recognized automatically. Is there a way to ｃｏｎｆｉｇure my device in order to communicate with J-Link? |
| A: | Yes! In most cases the J-Link auto-detection works fine and recognizes the core of a device automatically. However, in some cases the auto-detection of J-Link does not work e.g. if the core is not present in the JTAG chain by default and needs to be enabled by sending a command to another device in the JTAG-chain. In such cases, the connection sequence of J-Link can be customized by using a J-Link sｃｒｉｐｔ file which is ｅｘｅｃuted before the communication between J-Link and the target ｓｙｓｔｅｍ starts. The sｃｒｉｐｔ file allows maximum flexibility, so almost any target initialization which is necessary, can be supported. |
| Q: | I have multiple ARM cores in my JTAG chain. How can I debug them (simultaneously) with J-Link? |
| A: | Simple: Two ｏｒ more debuggers can use the same J-Link simultaneously. Multi-core debugging ｒｅｑｕｉｒｅs multiple debuggers ｏｒ multiple instances of the same debugger. You need to tell your debugger which device in the scan chain you want to debug. Additional special settings are not ｒｅｑｕｉｒｅd. |
| Q: | May I work with more than one J-Link at one time on the same machine? |
| A: | Yes, you can connect up to 4 J-Links to your PC. The only thing to do is, to give each J-Link a different USB address. By default, J-Link connects via USB-address 0. |
| Q: | Which CPUs are supported by J-Link? |
| A: | J-Link works with any ARM7/9/11, Cortex-M0/M1/M3/M4/R4 and Renesas RX600 series CPU. |
| Q: | What is the maximum JTAG speed supported by J-Link? |
| A: | The maximum JTAG speed supported by J-Link is 12MHz. J-Link Ultra supports a maximum JTAG speed of 25MHz. |
| Q: | What is the maximum download speed into RAM? |
| A: | The maximum download speed is currently about 720 KByte/sec for J-Link and 1440 KByte/sec for J-Link Ultra when downloading into RAM. However, the actual speed depends on various factors, such as JTAG, clock speed, host CPU core etc. Take a look at the performance comparison to see how fast J-Link works in relation to other emulators. |
| Q: | Can J-Link read back the status of the JTAG pins? |
| A: | Yes, the status of all pins can be read. This ｉｎｃｌｕｄｅs the outputs of J-Link as well as the supply voltage, which can be useful to detect hardware problems on the target ｓｙｓｔｅｍ. |
| Q: | Does J-Link support the Embedded Trace Buffer (ETB)? |
| A: | Yes. J-Link supports ETB. Most current ARM7 / ARM9 chips do not have ETB built-in. |
| Q: | Does J-Link support the Embedded Trace Macrocell (ETM)? |
| A: | No. ETM ｒｅｑｕｉｒｅs another connection to the ARM chip and a CPU with built-in ETM. Most current ARM7 / ARM9 chips do not have ETM built-in. |
The J-Link JTAG Isolator can be connected between J-Link and any ARM-board that uses the standard 20-pin JTAG-ARM connector to provide electrical isolation. This is essential when the development tools are not connected to the same ground as the application. It is also useful to protect the development tools from electrical spikes that often occur in some applications, such as motor control applications. Another typical field of application is development of products with sensors ｏｒ other analog circuitry, in which case the target hardware is protected from electrical noise originating from the development PC.
This product is compatible with J-Link, J-Link Pro and Flasher ARM.
The J-Link RX Adapter allows JTAG connections between J-Link and target hardware which comes with the Renesas RX600 series MCUs.
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The J-Link 9-pin Cortex-M Adapter allows JTAG, SWD and SWO connections between J-Link and Cortex-M based target hardware ｓｙｓｔｅｍs. It adapts from the 20-pin 0.1'' JTAG connector to a 19-pin 0.05'' Samtec FTSH connector as defined by ARM.
The J-Link 19-pin Cortex-M Adapter may also be used to connect J-Link to a non Cortex-M target as far as the target connector uses the same pinout as shown below.
By default, TRST is not connected, but the Cortex-M Adapter comes with a solder bridge (NR1) which allows TRST to be connected to pin 9 of the Cortex-M adapter.
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The J-Link 9-pin Cortex-M Adapter allows JTAG, SWD and SWO connections between J-Link and Cortex-M based target hardware ｓｙｓｔｅｍs. It adapts from the 20-pin 0.1'' JTAG connector to a 9-pin 0.05'' Samtec FTSH connector as defined by ARM.
The J-Link 9-pin Cortex-M Adapter may also be used to connect J-Link to a non Cortex-M target as far as the target connector uses the same pinout as shown below.
By default, TRST is not connected, but the Cortex-M Adapter comes with a solder bridge (NR1) which allows TRST to be connected to pin 9 of the Cortex-M adapter.
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This adapter allows to use J-Link with ARM7/9/11 targets using this 14-pin 0.1" mating JTAG connector defined by ARM.
The 14-pin connector, though defined by ARM as an ａｌｔｅｒnative to the 20-pin connector is not widely used on modern ｅｖａｌ boards.
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The J-Link PPC 14 pin Adapter allows JTAG connections between J-Link and target hardware which use an MCU with Power Architecture ｏｒ PowerPC. It adapts from the 20-pin 0.1'' to a 14-pin 0.1'' JTAG connector.
Note: J-Link support for PowerPC is not yet available.
Subscribe to J-Link software notification in order to be informed as soon as PowerPC support is available
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The 5V JTAG adapter extends the output voltage range of J-Link to 5V. Most targets have JTAG signals at voltage levels between 1.2V and 3.3V. These targets can be used with J-Link ARM without a 5V adapter. Higher voltages are common primarily in the automotive sector.
Note: Current J-Links are 5V tolerant, but output levels are limited to about 4V (See J-Link specifications for more details).
These output levels are sufficient for most 5V targets, meaning that current J-Links can be used with most 5V targets without adapter. The adapter is only ｒｅｑｕｉｒｅd for 5V targets that ｒｅｑｕｉｒｅ (input) signals above 3.3V.
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Technical data:
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The J-Link ARM 5V JTAG adapter is compatible to J-Link ARM revisions 5 ｏｒ newer.
Usage
The 5V JTAG adapter should be plugged directly into J-Link ARM with the 20 pin female connector. The target ribbon cable is then attached to the 20 pin male connector of the adapter. The picture below shows a J-Link ARM with a connected 5 volt adapter.
Installing the software will automatically install the J-Link USB drivers. It also offers to ｕｐｄａｔｅ applications which use the J-Link DLL.
Multiple versions of the J-Link software can be installed on the same PC without problems; they will co-exist in different directories.
J-Link software & documentation pack can also be used with J-Link KS, SAM-ICE, mIDASLink, DIGI JTAG Link and any other licensed J-Link compatible emulator.
Software and documentation pack V4.20g [8845 kb]
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J-Link software & documentation pack ｉｎｃｌｕｄｅs:
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Latest J-Link DLL release notes Latest J-Flash release notes Latest J-Link RDI DLL release notes
We frequently publish new Beta versions. The Beta versions follow our current development version very closely and contain the latest features and improvements.
However, the Beta versions are not thoroughly tested, but it is usually safe to assume that the Beta version can be used without risk.
Beta software version Beta software version for Linux Previous software versions
| Manual | Version | Size | |
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Flasher ARM manual (UM08007) | Rev. 18 | 478 KB |
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J-Flash manual (UM08003) | 4.10 Rev. 3 | 439.24 KB |
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J-Link manual (UM08001) | 4.20 Rev.0 | 2105 KB |
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J-Link GDB Server manual (UM08005) | 4.08 Rev. 0 | 508.33 KB |
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J-Link RDI manual (UM08004) | 4.08 Rev. 0 | 796.85 KB |
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J-Link USB Protocol manual (RM08001) | Rev. 6 | 337.48 KB |
The software consists of proprietary programs of SEGGER, protected under copyright and trade secret laws.
All rights, title and interest in the software are and shall remain with SEGGER.
SEGGER J-Link software may only be used with original SEGGER products and authorized OEM products.
The use of the licensed software to operate SEGGER product clones is prohibited and illegal.
More information...
更多请参考：http://www.segger.com/cms/jlink.html
真正的正版JLINK V8,2400元不含税，只包含：1条USB线 、1条JTAG线，1台机器。
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